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Impact of Dynamic Voltage Scaling and Thermal Factors on FinFET-based SRAM Reliability

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conference contribution
posted on 2016-04-26, 14:39 authored by F. R. Rosa, R. M. Brum, G. Wirth, Luciano Ost, R. Reis
FinFET technology appears as an alternative solution to mitigate short-channel effects in traditional CMOS down-scaled technology. Emerging embedded systems are likely to employ FinFET and dynamic voltage scaling (DVS), aiming to improve system performance and energy-efficiency. This paper claims that the use of DVS increases the susceptibility of FinFET-based SRAM cells to soft errors under radiation effects. To investigate that, a methodology that allows determining the critical charge according to the dynamic behaviour of the temperature as a function of the voltage scaling is used. Obtained results support our claim by showing that both temperature and voltage scaling can increase up to five times the susceptibility of FinFET-based SRAM cells to the occurrence of soft errors.

History

Citation

Proceedings of 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 137-140

Author affiliation

/Organisation/COLLEGE OF SCIENCE AND ENGINEERING/Department of Engineering

Source

IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 5-9 December 2015, Cairo, Egypt.

Version

  • AM (Accepted Manuscript)

Published in

Proceedings of 2015 IEEE International Conference on Electronics

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

isbn

978-1-5090-0246-7/

Copyright date

2015

Available date

2016-04-26

Publisher version

http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?&filter=AND(p_IS_Number:7440163)&searchWithin=impact of dymnamic voltage&pageNumber=1&resultAction=REFINE

Temporal coverage: start date

2015-12-06

Temporal coverage: end date

2015-12-09

Language

en

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