posted on 2009-03-19, 12:03authored byAyman K. Gendy, Lei Dong, Michael J. Pont
Knowledge of task execution time is a key requirement when determining the most appropriate scheduler algorithm (and
scheduler parameters) for use with embedded systems. Unfortunately, determining task execution times (ETs) can be a challenging process. This paper introduces a novel system
architecture which is based on two components (i) the main processor (MP) platform, containing the time-triggered (cooperative) scheduler and task code, and (ii) a second processor, executing a “scheduler agent” (SA). In the experiments described in this paper, the MP contains an
instrumented scheduler and, during a “tuning” phase, the SA measures – on line – the ET of each task as it runs. The
measured values are then used to fine tune the task schedule in an attempt to ensure that (i) all task constraints - such as
deadline and jitter - are met (ii) power consumption is reduced. After the tuning phase is completed the SA continues to monitor the MP and can take appropriate action in case of errors. In the paper, the effectiveness of the proposed architecture is demonstrated empirically by applying
it to a set of tasks that represent a typical embedded control system.
History
Citation
Proceedings of the ASME 2007 International Design Engineering Technical Conferences & Computers and Information in Engineering Conference (IDETC/CIE 2007).
Published in
Proceedings of the ASME 2007 International Design Engineering Technical Conferences & Computers and Information in Engineering Conference (IDETC/CIE 2007).
This paper was delivered at the Proceedings of the ASME 2007 International Design Engineering Technical Conferences & Computers and Information in Engineering Conference (IDETC/CIE 2007), September 4-7, 2007.