posted on 2016-04-26, 14:07authored byRafael Garibotti, Anastasiia Butko, Luciano Ost, Abdoulaye Gamatie, Gilles Sassatelli, Chris Adeniyi-Jones
A large portion of existing multithreaded embedded sofware has been programmed according to symmetric shared memory platforms where a monolithic memory block is shared by all cores. Such platforms accommodate popular parallel programming models such as POSIX threads and OpenMP. However with the growing number of cores in modern manycore embedded architectures, they present a bottleneck related to their centralized memory accesses. This paper proposes a solution tailored for an efficient execution of applications defined with shared-memory programming models onto on-chip distributed-memory multicore architectures. It shows how performance, area and energy consumption are significantly improved thanks to the scalability of these architectures. This is illustrated in an open-source realistic design framework, including tools from ASIC to microkernel.
Funding
IEEE Computer Society
History
Citation
IEEE Transactions on Computers, 2015, PP (99)
Author affiliation
/Organisation/COLLEGE OF SCIENCE AND ENGINEERING/Department of Engineering