IEEE JSSC submitted_manuscript_oa.pdf (692.55 kB)
Radiation Hardening by Design of Asynchronous Logic for Hostile Environments
journal contributionposted on 2012-10-24, 09:06 authored by DJ Barnhart, T Vladimirova, MN Sweeting, KS Stevens
A wide range of emerging applications is driving the development of wireless sensor node technology towards a monolithic system-on-a-chip implementation. Of particular interest are hostile environment scenarios where radiation and thermal extremes exist. Radiation hardening by design has been recognized for over a decade as an alternative open-source circuit design approach to mitigate a spectrum of radiation effects, but has significant power and area penalties. Similarly, asynchronous logic design offers potential power savings and performance improvements, with a tradeoff in design complexity and a lesser area penalty. These side effects have prevented wider acceptance of both design approaches. A case study supporting the development of monolithic system-on-a-chip wireless sensor nodes is presented. Synchronous, hardened, and asynchronous/hardened implementations of a textbook microprocessor in 0.35 mum austriamicrosystems SiGe BiCMOS technology are compared. The synergy of this novel asynchronous/hardened design approach is confirmed by simulation and hardware results.
This effort is sponsored by the Air Force Office of Scientific Research, Air Force Material Command, USAF, under grant number FA8655-06-1-3053. The authors gratefully acknowledge the National Physics Laboratory of the United Kingdom for their no-cost collaborative support of the total ionizing dose evaluation
CitationIEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (5), pp. 1617-1628 (12)
Author affiliation/Organisation/COLLEGE OF SCIENCE AND ENGINEERING/Department of Engineering
- AM (Accepted Manuscript)