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Parallel Algorithms for Testing Finite State Machines:Generating UIO Sequences
journal contribution
posted on 2020-04-08, 15:34 authored by Robert M Hierons, Uraz Cengiz Turker- This paper describes an efficient parallel algorithm that uses many-core GPUs for automatically deriving Unique Input Output sequences (UIOs) from Finite State Machines. The proposed algorithm uses the global scope of the GPU's global memory through coalesced memory access and minimises the transfer between CPU and GPU memory. The results of experiments indicate that the proposed method yields considerably better results compared to a single core UIO construction algorithm. Our algorithm is scalable and when multiple GPUs are added into the system the approach can handle FSMs whose size is larger than the memory available on a single GPU.
Funding
Funding Agency: 10.13039/501100004410-Scientific and Technological Research Council of Turkey; 10.13039/100007065-NVIDIA;
History
Citation
IEEE Transactions on Software Engineering ( Volume: 42 , Issue: 11 , Nov. 1 2016 )Version
- AM (Accepted Manuscript)
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IEEE Transactions on Software EngineeringVolume
42Issue
11Pagination
1077 - 1091Publisher
Institute of Electrical and Electronics Engineers (IEEE)issn
0098-5589eissn
1939-3520Copyright date
2016Available date
2016-03-09Publisher DOI
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https://ieeexplore.ieee.org/abstract/document/7429774Language
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